PRL-444LV, 4 Channel TTL/CMOS to LVDS Level Translator and Line Driver

SKU:

$ 718.75

Applications:

  • TTL to LVDS Logic Level Translation
  • Conversion of Single-Ended TTL Signals to Differential Signals for Driving Long Lines
  • Mini Modular Instrument for interfacing with High Speed Data Communications Equipment

Features:

  • 250 MHz Typical Maximum Clock Rate
  • 4 Single Ended Inputs with Selectable 50 Ω or 1 kΩ Termination
  • 4 LVDS Outputs for Driving 50 Ohm Cables into 100 Ω Floating Loads
  • SMA I/O Connectors
  • Single Supply, +7.5 VDC to +12 VDC, operation
  • Ready-to-Use 1.3 x 2.9 x 2.9-in. Module includes a ±8.5 V/1.4 A AC/DC Adapter

Description

The PRL-444LV-SMA is a 4 Channel TTL to LVDS translator module. 

The input resistance of the PRL-444LV-SMA inputs can be selected to be either 50 Ω or 1 kΩ by a common toggle switch. The 1 kΩ inputs are desirable when interfacing with low power circuits.

The four pairs of complementary outputs are designed for driving floating 100 Ω loads, normally the configuration used in LVDS input circuits. The output swing is typically 300 mV with a common mode voltage of 1.0 V.

All I/Os are DC coupled and have SMA connectors. A block diagram showing the equivalent input and output circuits of the PRL-444LV-SMA is shown in Fig. 1.

The PRL-444LV-SMA is housed in a 1.3 x 2.9 x 2.9-in. extruded aluminum enclosure and is supplied with a ±8.5 V/±1.4 A AC/DC Adapter. The PRL-444LV-SMA may also be ordered without the power supply as part number PRL-444LV-SMA-OEM. A maximum of four units can share the included PRL-760C AC/DC adapter using additional units of cable #88000102-4. If mounting is desired, a pair of the #35001420 mounting brackets can accommodate any two PRL modules of the same length.

A complementary product, the PRL-425QLT-SMA, performs the opposite conversion of 4 LVDS signals to 4 TTL signals. The coaxial outputs can also be adapted to off-the-shelf Cat5/Cat5e/Cat6a network cabling, and then back again to coax, via one or more PRL-RJ45-SMA adapters.

Fig. 1: PRL-444LV Block Diagram

PRELIMINARY SPECIFICATIONS: (0° C ≤ TA ≤ 35° C)*

SYMBOL PARAMETER Min Typ Max UNIT Comment
RIN1 Input Resistance 49.5 50.0 50.5 Ω  
RIN2 Input Resistance 990 1000 1010 V  
VIL TTL input Low Level -0.5 0.0 0.5 V  
VIH TTL input High Level 2.0 2.4 5.0 V  
VDC DC Input Voltage 7.5 8.5 12.0 V  
VAC1 AC/DC Adapter Input Voltage, 120 103 115 127 V  
VAC1 AC/DC Adapter Input Voltage, 220 206 230 254 V  
IDC1 DC Input Current @ 50 MHz 65 85 mA  
IDC2 DC Input Current @ 250 MHz 125 mA  
VOPP Output Differential Voltage, peak-to-peak 250 300 450 mV  
VCMO Output Common mode voltage1 1.0 1.2 V  
tPLH Propagation Delay to output ↑ 2 3 ns  
tPHL Propagation Delay to output ↓ 2 3 ns  
tr/tf1 Rise/Fall Times (10%-90%)1 1.0 1.8 ns
fMAX Max Clock Frequency 200 250   MHz
tSKEW Skew between any 2 outputs 300 750 ps  
DTY Duty Cycle @ 50 MHz 45/55
  Size 1.3 x 2.9 x 2.9 in.  
  Weight 5 Oz  
  Shipping Weight 4 lbs