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DescriptionThe PRL-444LV is a 4 Channel TTL to LVDS translator module. The input resistance of the inputs can be selected to be either 50 Ω or 1 kΩ by a common toggle switch. The 1 kΩ inputs are desirable when interfacing with low power circuits. The four pairs of complementary outputs are designed for driving floating 100 Ω loads, normally the configuration used in LVDS input circuits. The output swing is typically 300 mV with a common mode voltage of 1.0 V. |


SPECIFICATIONS: (0° C ≤ TA ≤ 35° C)*
| SYMBOL | PARAMETER | Min | Typ | Max | UNIT | Comment |
|---|---|---|---|---|---|---|
| RIN1 | Input Resistance | 49.5 | 50.0 | 50.5 | Ω | |
| RIN2 | Input Resistance | 990 | 1000 | 1010 | V | |
| VIL | TTL input Low Level | -0.5 | 0.0 | 0.5 | V | |
| VIH | TTL input High Level | 2.0 | 2.4 | 5.0 | V | |
| VDC | DC Input Voltage | 7.5 | 8.5 | 12.0 | V | |
| VAC1 | AC/DC Adapter Input Voltage, 120 | 103 | 115 | 127 | V | |
| VAC1 | AC/DC Adapter Input Voltage, 220 | 206 | 230 | 254 | V | |
| IDC1 | DC Input Current @ 50 MHz | 65 | 85 | mA | ||
| IDC2 | DC Input Current @ 250 MHz | 125 | mA | |||
| VOPP | Output Differential Voltage, peak-to-peak | 250 | 300 | 450 | mV | |
| VCMO | Output Common mode voltage1 | 1.0 | 1.2 | V | ||
| tPLH | Propagation Delay to output ↑ | 2 | 3 | ns | ||
| tPHL | Propagation Delay to output ↓ | 2 | 3 | ns | ||
| tr/tf1 | Rise/Fall Times (10%-90%)1 | 1.0 | 1.8 | ns | Note 1 | |
| fMAX | Max Clock Frequency | 200 | 250 | MHz | Note 1 | |
| tSKEW | Skew between any 2 outputs | 300 | 750 | ps | ||
| DTY | Duty Cycle @ 50 MHz | 45/55 | ||||
| Size | 1.3 x 2.9 x 2.9 | in. | ||||
| Weight | 5 | Oz | ||||
| Shipping Weight | 3 |
lbs | ||||
1-SMA model only. fmax and tr/tf for RJ45 models are pending.

