1:4 Differential NECL Fanout Buffer/Line Driver, 3.5 GHz


$ 1,614.60


  • Fan out Single-ended/Differential NECL Inputs into four pairs of Differential NECL Outputs for driving long lines
  • Ideal for receiving signals from long lines
  • Fan out GHz Sinewave signals into four pairs of Differential NECL signals
  • 1 PPS Distribution/IRIG-B Distribution
  • An Essential Lab Tool for Working with NECL Circuits


  • 3.5 GHz typical fMAX
  • Single-ended or Differential Inputs
  • Internal 50 Ω/-2 V Input Terminations also accept AC coupled PECL or Sinewave signals
  • Complementary Outputs drive 50 Ω loads terminated to -2 V or AC- coupled 50 Ω loads
  • DC- Coupled I/Os Compatible with ECLinPS or 100 kH Devices
  • SMA I/O Connectors
  • Ready-to-Use 1.3 x 2.9 x 2.9-in. module includes AC/DC Adapter


The PRL-434A is a 1:4 Differential NECL Fanout Buffer module. It is intended for fanning out single-ended or differential NECL signals into four pairs of differential outputs. It can also be used for converting AC coupled GHz sinewave or PECL signals into differential NECL signals.

A switch selects either single-ended or differential inputs, as shown in Fig. 1. In the differential input mode, both inputs D and D are terminated internally into 50 Ω/-2 V, and, therefore, either one or both inputs can accept AC coupled signals as well. In the single-ended input mode, signals should be connected to the D inputs only. The D inputs are switched internally to VBB, nominally -1.3 V, and termination resistors RT for the D input channels are changed to 62 Ω. Complementary outputs of the PRL-434A are designed for driving 50 Ω loads terminated into -2 V. With internal pull-down resistors these outputs can also be AC coupled for driving 50 Ω loads terminated to ground or to other voltages.

The PRL-434A is housed in a 1.3 x 2.9 x 2.9-in. extruded aluminum enclosure and is supplied with a ±8.5 V/1.8 A AC/DC Adapter.

PRL-434A Block Diagram

(0° C ≤ TA ≤ 35° C)*

Symbol Parameter PRL-434A UNIT Comments
Min Typ Max
Rin Input Resistance 49.5 50.0 50.5 Ω  
VTT D Input Termination Voltage -2.2 -2.0 -1.8 V D input
VT1 D Input Termination Voltage -2.2 -2.0 -1.8 V D input
VT2 D Input Termination Voltage (variable) -1.17 -1.30 -1.43 V D input
VIL Input Lo Voltage -1.95 -1.60 -1.48 V  
VIH Input Hi Voltage -1.13 -0.90 -0.81 V  
VOL Output Lo Voltage -1.95 -1.60 -1.48 V  
VOH Output Hi Voltage -1.13 -0.90 -0.81 V  
IDC1 DC Input Current, +8.5 V 0 mA  
IDC2 DC Input Current, -8.5 V   -360 -385 mA  
VDC1 DC Input Voltage, +8.5 V N/A V  
VDC2 DC Input Voltage, -8.5 V -7.5 -8.5 -12 V  
VAC1 AC/DC Adapter Input Voltage, 120 VAC 103 115 127 V  
VAC2 AC/DC Adapter Input Voltage, 220 VAC 206 230 254 V  
TPLH Propagation Delay to output ↑   1100 1500 ps  
TPHL Propagation Delay to output ↓   1100 1500 ps  
tr/tf Rise/Fall Times (20%-80%)   250 360 ps Note (1)
TSKEW Skew between any 2 outputs   20 75 ps  
FMAX Max clock frequency 3.5 4.0   GHz Note (2)
VCMR Common Mode Range -2.15   -0.40 V Note (3)
  Size  1.3 x 2.9 x 2.9  in.  
  Weight 5 Oz  
  Shipping Weight incl. AC adapter 4 lb.  

*All dynamic measurements are made with outputs terminated into 50 Ω /-2 V, using the PRL-550NQ4X, four channel ECL Terminator, connected to a 50 Ω input sampling oscilloscope.


(1). The output rise and fall times of each channel are measured with its complementary output terminated into 50 Ω/-2 V. An unused complementary 50 Ω output must be either terminated into 50 Ω/-2 V or AC coupled into a 50 Ω load; otherwise, output waveform distortion and rise time degradation will occur. Use the PRL-ACT-50 Dual Channel, AC Coupled 50 Ω Terminator for terminating unused outputs.

(2). fMAX is measured using differential inputs only. Each pair of differential outputs are first divided by four, using the PRL-255N, and then measured using the PRL-550NQ4X, four channel ECL Terminator, connected to a sampling 'scope. 3.0 GHz guaranteed fMAX is currently limited by production test equipment.

(3). When the unit is driven by an AC coupled sinewave signal in the differential input mode, the signal swing is symmetrical with respect to -2 V. The peak-to peak swing of the input signal should not exceed these Common Mode limits.