4 Channel High Input Impedance 50 Ohm TTL Line Driver


$ 962.55


  • Converting High Impedance TTL/CMOS Outputs to 50 Ω TTL Outputs
  • Long Line Drivers
  • High Speed Digital Communications System Testing
  • Basic Lab Tool
  • 1 PPS/IRIG-B Line Driver
  • Hi/Lo Logic Level Generation


  • fmax > 70 MHz Normal/50 MHz Invert
  • Drives 100 ft of cable @ 50 MHz Normal
  • 2 ns Typical Output Rise & Fall Times
  • Four independent, TTL-Compatible 10 kΩ Inputs
  • Four independent, 50 Ω TTL Outputs
  • BNC or SMA I/O Connectors
  • DC Coupled I/Os
  • Self-contained 1.3 x 2.9 x 2.9-in. unit includes an AC/DC adapter


The PRL-444 is a four channel TTL/CMOS input, 50 Ω output TTL/CMOS Line Driver. It is intended for interfacing with signal sources, such as digital I/O cards, that cannot drive 50 Ω loads to valid TTL levels. Each input has a 10 kΩ pulled up to 2.5 V so that it can also be driven by open-collector devices. The 50 Ω back-terminated outputs of the PRL-444 can drive long lines with or without 50 Ω load terminations. With 50 Ω load terminations, however, all outputs can drive 100 ft of 50 Ω cables at clock rates greater than 60 MHz.

If the inputs are left open, all outputs will go Hi, because the inputs are pulled up to +2.5 V. All outputs can be set to the Lo state by either setting the polarity inverting switch to the down position or terminating all inputs to 2 kΩ or lower. The polarity-inverting switch enables easy generation of four static TTL Hi/Lo logic signals when the inputs are not driven.

The PRL-444 is housed in a 1.3 x 2.9 x 2.9-in. extruded aluminum enclosure and is supplied with a ±8.5 V/±1.4 A AC/DC Adapter. A maximum of four units can share a single AC/DC adapter using the PRL-730 voltage distribution module. If mounting is desired, a pair of the #35001420 mounting brackets can accommodate any two PRL modules of the same length. Please refer to the Accessories Section of the literature for more detail.

A block diagram showing the equivalent input and output circuits of the PRL-444 is shown in Fig. 1.



Symbol Parameter Min Typ Max Unit Comments
RIN Input Resistance 9.9 10.0 10.1 Pulled up to +2.5 V
ROUT Output Resistance   50   Ω  
VIL TTL Input Low Level -0.5 0.0 0.5 V  
VIH TTL Input High Level 2.0 2.4 5.0 V  
VOL TTL Output Low Level 0.00 0.25 0.50 V RL=50 Ω
VOH1 TTL Output High Level 2.2 2.5   V RL=50 Ω @ DC
VOH2 TTL Output High Level 4.4 5.0   V RL=1 M Ω @ DC
IDC1 DC Input Current, +8.5 V   260 300 mA f ≤ 75 MHz
IDC2 DC Input Current, +8.5 V   220 250 mA f =50 MHz sq. wave(1)
VDC1 DC Input Voltage, +8.5 V 7.5 8.5 12 V  
VDC2 DC Input Voltage, -8.5 V N/A V  
VAC1 AC/DC Adapter Input Voltage, 120 VAC 103 115 127 V  
VAC2 AC/DC Adapter Input Voltage, 220 VAC 206 230 254 V  
TPLH Propagation Delay to output ↑   15 20 ns  
TPHL Propagation Delay to output ↓   15 20 ns  
tr Rise Time (10%-90%)   2.2 3.0 ns f =50 MHz sq. wave
tf Fall Time (10%-90%)   1.8 3.0 ns f =50 MHz sq. wave
TSKEW Skew between any 2 outputs   900 1800 ps f =50 MHz sq. wave
FMAX1 Max. Clock Frequency, Normal Outputs 70 80   MHz RG58C/U Cable length = 3 ft
FMAX2 Max. Clock Frequency, Inverted Outputs 50 60   MHz RG58C/U Cable length = 3 ft
FMAX3 Max. Clock Frequency(2), Normal Outputs 50 60    MHz RG58C/U Cable length = 100 ft
PWMIN Min. Pulse Width   8   ns ↑ Input
PWMIN Min. Pulse Width   8   ns ↓ Input
  Size 1.3 x 2.9 x 2.9 in.  
  Weight, excluding AC adapter 5 Oz  
  Shipping weight, including AC adapter 4 lb.  
Unless otherwise specified, dynamic measurements are made with all outputs terminated into 50 Ω.  
(1) For sharing a single PRL-760E, ± 8.5 V ±1.8 A AC/DC adapter, the total current should not exceed 1.8 A.
(2) MAX3 is measured by connecting a second PRL-444 at the end of the 100 ft. cable.

While we believe these models to be accurate, no representations are made as to accuracy or suitability for any application: