Pulse Picking with a Frequency Divider and an AND Gate

Fig. 1: Pulse Picking Setup with TTL Output

A very common use of Frequency Divider modules from Pulse Research Lab is for triggering laser amplifiers at frequencies far lower than the frequencies at which their Titanium-Sapphire laser oscillators operate, with tight synchronization and low jitter.

Offering 3 stages of division from f/2 – f/4096, 3 input signal types, edge-triggered operation, and 3 pairs of complementary outputs in TTL and NECL logic, the PRL-260BNT offers unparalleled flexibility and performance at an affordable price.

A common application is to receive the ~80 MHz output from the photodiode in a Ti:S  laser oscillator cavity, convert it to a logic-compatible signal, and then divide it down to 1 MHz, 1 kHz, or even down to 1 Hz. This application was documented in an article for Laser Focus World in 2007, and customers have been buying our frequency dividers for this application ever since.

A common request from many of our customers has been to preserve the narrow pulse widths from the photodiode outputs, while achieving the high division ratios (e.g. low frequencies) required by the downstream equipment.

When the ϕ1 second-stage divider of the PRL-260BNT is programmed for f/1, the output pulse width is equal to the input pulse period, e.g. a 12.5 ns for an 80 MHz toggle rate of a typical Ti:S oscillator. While this is sufficient for some applications, other applications require a narrower pulse width.

One solution to use a logical AND of the original 80 MHz pulse train and the divided signal. Because the divided signal’s pulse width spans exactly one period, the AND gate will output only one of the original photodiode pulses, as shown in the scope captures below.

Figure 2 shows the original 80 MHz pulse train on Ch. 1 (green; sample aliasing causes the “bursty” display, but the pulse train is continuous). Ch. 2 (red) shows the TTL output of the PRL-260BNT set for f/80 = 1 MHz, and Ch. 2 (magenta) shows the output of the AND gate, also at 1 MHz. The width, rise time, and fall time for Ch. 3 are inaccurate at this time scale.

Fig. 2: 80 MHz divided by 80 = 1 MHz

When we zoom in to Fig. 3, we see the original narrow pulse width of 2 ns on the 80 MHz pulse train and the 12.5 ns pulse width from the output of the PRL-260BNT. When these two pulses trains are ANDed by the PRL-601T Programmable Logic Gate module, the narrow pulse width is preserved along with the divided frequency. There is some pulse stretching through the PRL-601T, so the output pulse width is now ~3.4 ns, but this is still much narrower than the 12.5 ns pulse generated by the PRL-260BNT alone.

The PRL-601T output generates a TTL-compatible >2.2 V into a 50 Ohm load, compatible with many types of equipment.

Fig. 3: 80 MHz and 1 MHz Pulse Trains with 2 ns, 12.5 ns and 3.5 ns pulse widths 


If even narrower pulses are required, then the NECL path through the PRL-260BNT can be used. In this example, the original 80 MHz pulse train now has a pulse width of only 1 ns. The divided NECL output of the PRL-260BNT has a pulse width of 12.5 ns, and the ANDed pulse has a width of only 1 ns. For this application the PRL-435N NECL AND Gate module was used instead of the PRL-601T. With a rise/fall time of < 300 ps, this module is well suited to creating narrow pulses.

Fig. 4: Pulse Picking Setup with NECL Output

In the zoomed-out scope capture, the divided frequency of 1 MHz is shown. The width, rise time, and fall time for Ch. 3 are inaccurate or un-resolvable at this time scale.

Fig. 5: 80 MHz divided by 80 = 1 MHz

When zoomed in, the scope shows the original 1 ns pulse width, the 12.5-ns-wide divided pulse, and the gated 1 MHz pulse with 1 ns width.

This pulse is NECL, with an amplitude of approximately 800 mVPP. NECL outputs from PRL modules can be AC-coupled, and because of the very low duty cycle of this pulse train the low level will be approximately at ground level, with the high level around 800+ mV. 

Fig. 6: 80 MHz and 1 MHz Pulse Trains with 1 ns, 12.5 ns and 1 ns pulse widths


If a very narrow, TTL-compatible pulse is required, then the 1 ns NECL pulse can be converted to TTL using the PRL-350ATTL Comparator module:


Fig. 7: Pulse Picking Setup with TTL Output, 1 ns pulse width

Because the PRL-350ATTL has a 50 Ohm/GND input, the NECL output of the PRL-435N must be AC-coupled into it, using a PRL-SC-104A, 0.1 µF DC Block. If the PRL-350ATTL is set for normal triggering at +50 mV, some noise around GND will cause spurious triggering and extra pulses. To clean this up, we used a +200 mV bias on the Vth input to raise the input triggering voltage above the noise.

The result is a clean pulse with a TTL-compatible VHI> 2.2 V into 50 Ohms, with a pulse width of approximately 1 ns, and rise/fall times of <350 ps. 

Zoomed out, showing 1 MHz divided frequency. The width, rise time, and fall time for Ch. 3 and Ch. 4 are inaccurate or un-resolvable at this time scale.

Fig. 8: 80 MHz divided by 80 = 1 MHz

Zoomed in, showing 1 ns final pulse widths, and VHI > 2.5 V for the TTL-compatible output of the PRL-350ATTL:

Fig. 9: 80 MHz and 1 MHz Pulse Trains with 1 ns, 12.5 ns and 1 ns pulse widths, TTL-Compatible Levels


Although the PRL-260BNT can divide by ratios up to f/4096, the narrow-width feature is available only at ratios of f/2 – f/256, e.g. when the second stage divider of ϕ1 is set for 1. In all other cases the output signal becomes a square wave.

But if narrow pulses and larger division ratios are required, additional PRL-260BNT units can be cascaded. As long as the narrow-pulse feature is used, an AND gate can be used to ensure that only a single pulse from the preceding stage is passed, and thus the original narrow pulse width from the photodiode can be retained. By cascading multiple units of the PRL-260BNT and suitable AND gates, the final division ratio can be arbitrarily large, while preserving an original pulse width of as narrow as 1 ns.

Please contact sales@pulseresearchlab.com for more details.

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