Q5: What does a typical ECL input circuit look like?

A5: Instead of describing each ECL, LVECL, PECL or LVPECL input circuit separately, we shall focus on the generalized "ECL" circuit, with a V_CC supply and a V_EE supply.

The basic input circuit of an ECL device is simply the base of a NPN transistor. For a device installed inside a piece of equipment, however, some form of an input termination is always used. The most common input configuration is one that has a 50 Ω termination into V_TT, where V_TT is defined as V_CC- 2 V. This configuration is used for either single-ended or differential inputs, as shown in Fig. 2A. 

The second configuration consists of a single floating resistor connected between the differential inputs of an ECL device, as shown in Fig. 2B. 

The most common value of this resistor is 124 Ω. Other values such as 75 Ω, 78 Ω, and 100 Ω are also used. The third consists of two resistors in series, and the series combination is connected across the differential inputs of the ECL device, and the junction of the resistors is bypassed by a capacitor to ground, as shown in Fig. 2C. Other configurations are also used.

The reason why ECL input circuits inside a piece of equipment must always be terminated as described above has to do with matching impedance. Without proper input terminations, it would not be possible to interconnect various equipment together.

For a listing of PRL products using ECL Circuits, click here

Q6: What does a typical ECL Output Circuit look like?

A6: As shown in Fig. 1 earlier, the ECL output circuit consists of an open NPN emitter, and it was also pointed out that a pull-down resistor is needed in order to turn on the emitter follower. In a piece of equipment provided with ECL outputs, however, internal pull-down resistors may or may not be included. Since pull-down resistors consume power, the equipment manufacturers don’t put them in unless they have to. If it is not labeled, it may be assumed that they are not included. As we shall see in the following discussion (Question 7), ECL outputs without the proper internal pull-down resistors cannot drive AC coupled loads or floating loads.

For a listing of PRL products using ECL Circuits, click here

Q7: How to Drive ECL Inputs connected to 50 Ω/V_TT Terminations?

A7: There are two cases to consider. The first involves using an ECL output device as the driver, and the second uses a 50 Ω output generator. In the first case, there is nothing to adjust, and the question is whether or not the I/O are compatible. In the second case, the generator output Hi and Lo levels must be adjusted so that they produce the correct levels at the input of the receiving device. In the following discussion, the standard ECL levels will be used. The basic principle is applicable to LVECL, PECL and LVPECL as well.

Case I: The driver is an ECL device.

For a single input configuration, it can be connected directly to the open emitter of an ECL output connector via a 50 Ω cable, as shown in Fig. 3. 

It is seen that the 50 Ω resistor connected to –2 V supplies the current to the open emitter, and, therefore, no pull-down resistor is needed from the driver emitter follower. Note that the unused input is assumed to be connected to a bias voltage V_BB internally as shown. If a pair of differential input connectors are present, either the unused input must be connected to V_BB externally or both inputs must be driven using a pair of complementary signals.

Although no calculation is required for interconnecting the I/O’s in this case, the simple calculation given below is helpful in seeing why the pull-down resistor plays an important part. Assuming the "hi" and "lo" logic levels developed under this "heavy loading" condition to be –0.95 V and –1.75 V, respectively, the output currents from the driver circuit can be easily calculated to be:

I_OH=(2-0.95)V/50 Ω =21 mA and

I_OL=(2-1.75)V/50 Ω =5 mA

The exact values of the currents are not important, as long as they are positive numbers, because an NPN emitter can only source current but not sink current. An ECL output with internal pull-down resistor can also drive this type of input circuit. It should be noted that a 50 Ω cable must be used for this configuration because the load at the end of the cable is 50 Ω. For more discussion see Transmission Line FAQs. 

Case II: The driver is a 50 Ω-output Generator

Fig. 5 shows an equivalent circuit of a 50 Ω-output pulse generator connected to a 50 Ω/-2 V input terminated ECL circuit. 

In order to produce a set of Hi and Lo levels equal to -0.8 V and –1.6 V, respectively, at the ECL device input, the open circuit Hi and Lo levels of the pulse generator should be set to +0.4 V and –1.2 V, respectively. This is easily verified by calculating the current in each logic state using Fig. 5. Often, for convenience, the Lo level of –2 V is used. However, the –0.8 V/-2 V levels are not symmetrical with respect to the ECL threshold voltage V_BB, which has a typical value of –1.3 V. The net result of using this set of input voltages is that the propagation delays of the output rising and falling edges will not be exactly the same.

The output levels of the 50 Ω-output Generator required for LVECL, PECL and LVPECL are given in A4, Table I. It is important to note that ECL and LVECL are compatible, but PECL and LVPECL are not.

PRL Products using ECL Circuits:

Our line of Logic Level Translators

The following Logic Function Modules:

• PRL-170 ECL Xtal Clock Source
• PRL-255 ECL Frequency Divider
• PRL-258 4 Phase ECL Clock Generator
• PRL-430 Dual Channel Differential ECL Receiver
• PRL-431 1:2 Differential Fan Out ECL Buffer
• PRL-434A 1:4 Differential Fan Out ECL Buffer
• PRL-435 Differential Input AND Gate
• PRL-470 High Speed, Line Driver-Level Translator
• PRL-480 Dual Channel Programmable ECL Delay Module